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Calculating “FLOP” using Intel® Software Development Emulator (Intel® SDE)
PurposeFloating point operations (FLOP) rate is used widely by the High Performance Computing (HPC) community as a metric for analysis and/or benchmarking purposes. Many HPC nominations (e.g., Gordon...
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Measuring Power on Intel® Xeon Phi™ Product Family Devices
Understanding power measurements and the issues associated with various power measurement methodologies is key to utilizing, procuring and deploying large HPC (High Performance Computing) clusters...
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Combine ANSYS Mechanical* with the Intel® Xeon Phi™ coprocessor for dramatic...
Download PDF[PDF 224KB]Incremental performance gains for engineering simulations can improve productivity and shrink product development timelines and time to market. Doubling performance can transform...
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High Bandwidth Memory (HBM): how will it benefit your application?
PurposeThe first step towards the usability of MCDRAM or High Bandwidth Memory (HBM) is assessing the memory bandwidth utilization for your application.This article provides basic instructions on how...
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Intel® Code Modernization Enablement Program
Intel® Code Modernization Enablement Program for DevelopersIntel is introducing the Intel® Code Modernization Enablement Program for Developers. Code modernization allows software traditionally...
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Calculating “FLOP” using Intel® Software Development Emulator (Intel® SDE)
PurposeFloating point operations (FLOP) rate is used widely by the High Performance Computing (HPC) community as a metric for analysis and/or benchmarking purposes. Many HPC nominations (e.g., Gordon...
View ArticleIntel Software Tools Technical Webinar Series
These free technical webinars cover tips and techniques that will help sharpen your development skills to create faster, more reliable applications. Technical experts will cover topics ranging from...
View ArticleAn Embree-Based Viewport Plugin for Autodesk Maya* 2014 with Support for the...
Download PDFPurposeThis code recipe describes how to obtain, build, and use the Embree-based Viewport Plugin for Autodesk Maya* 2014 on either Microsoft Windows* or Linux*. This plugin (actually a...
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Significant Scalability and Performance Improvement for Intel® MKL PARDISO on...
Intel® MKL 11.3 Beta (released in April 2015) contains significant performance and scalability improvements for the direct sparse solver (a.k.a. Intel MKL PARDISO), on SMP systems. These improvements...
View ArticleProminent features of the Intel® Manycore Platform Software Stack (Intel®...
The Intel® Manycore Platform Software Stack (Intel® MPSS) version 3.5 was released on April 6th, 2015. This page lists the prominent features in this release.Intel® MPSS 3.5Added support for Lustre...
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Intel® Xeon Phi™ Coprocessor Performance Proof Points
This presentation is an expanding collection of Intel® Xeon Phi™ coprocessor test cases or “proof points” that demonstrate improved software performance for key applications and benchmarks in key...
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Explicit offload for Quantum ESPRESSO
PurposeThis code recipe describes how to get, build, and use the Quantum ESPRESSO code that includes support for the Intel® Xeon Phi™ coprocessor with Intel® Many-Integrated Core (MIC) architecture....
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Accelerating Financial Applications on Intel® architecture
Download PDFAccelerating Financial Applications on Intel Architecture [PDF 575.55KB]Download FileQuantLib_optimized_for_IA.tar.gz [TAR 522.48KB]Abstract: A paper titled Accelerating Financial...
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Debugging Intel® Xeon Phi™ Applications on Linux* Host
ContentsIntroductionDebug Solution for Intel® MICHow to get it?Why use GNU* GDB provided by Intel?Why is Intel providing a Command Line and Eclipse* IDE Integration?Deprecation NoticeFeaturesRegister...
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Intel® Code Modernization Enablement Program
Intel® Code Modernization Enablement Program for DevelopersIntel is introducing the Intel® Code Modernization Enablement Program for Developers. Code modernization allows software traditionally...
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Parallel Programming Books
Use these parallel programming resources to optimize with your Intel® Xeon® processor and Intel® Xeon Phi™ coprocessor.High Performance Parallelism Pearls: Multicore and Many-core Programming...
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Elusive Algorithms – Parallel Scan
jim@quickthreadprogramming.comThis article on parallel programming will choose one of those elusive algorithms that upon first glance seem to be neither vectorizable nor parallelizable. The intent of...
View ArticleGROMACS recipe for symmetric Intel® MPI using PME workloads
ObjectivesThis package (scripts with instructions) delivers a build and run environment for symmetric MPI runs. This file is actually the README of the package. Symmetric stands for employing a Xeon®...
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Optmization Techniques for the Intel® MIC Architecture: Part 2 of 3
AbstractThis is part 2 of a 3-part educational series of publications introducing select topics on optimization of applications for Intel’s multi-core and manycore architectures (Intel® Xeon®...
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What is Code Modernization?
Modern high performance computers are built with a combination of resources including: multi-core processors, many core processors, large caches, high speed memory, high bandwidth inter-processor...
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